Low Power Digital Frequency Conversion Architectures

State-of-the-art data communication systems make extensive use of digital hardware. Besides baseband modulation functions, also the frequency tuning functions are now being shifted from analog to digital implementation. Integration, cost and ease of programming are the primary motivations for doing this. This paper presents an alternative to the traditional digital frequency conversion architec-tures. The proposed architecture achieves low power as well as high speed operation, and achieves this dual goal by reducing programmability. A multi-rate ltering approach is used, which is applicable for both upconversion and downconversion of quadrature modulated data.